/* $XConsortium: scanpci.c /main/25 1996/10/27 11:48:40 kaleb $ */ /* * name: scanpci.c * * purpose: This program will scan for and print details of * devices on the PCI bus. * author: Robin Cutshaw (robin@xfree86.org) * * supported O/S's: SVR4, UnixWare, SCO, Solaris, * FreeBSD, NetBSD, 386BSD, BSDI BSD/386, * Linux, Mach/386, ISC, DGUX * DOS (WATCOM 9.5 compiler) * * compiling: [g]cc scanpci.c -o scanpci * for SVR4 (not Solaris), UnixWare use: * [g]cc -DSVR4 scanpci.c -o scanpci * for DOS, watcom 9.5: * wcc386p -zq -omaxet -7 -4s -s -w3 -d2 name.c * and link with PharLap or other dos extender for exe * * case Intel DG/ux: gcc -DDGUX scanpci.c -o scanpci (with gcc-DG-2.7.2.88) * */ /* $XFree86: xc/programs/Xserver/hw/xfree86/etc/scanpci.c,v 3.34.2.35 1999/11/26 15:24:08 hohndel Exp $ */ /* * Copyright 1995 by Robin Cutshaw * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that * the above copyright notice appear in all copies and that both that * copyright notice and this permission notice appear in supporting * documentation, and that the names of the above listed copyright holder(s) * not be used in advertising or publicity pertaining to distribution of * the software without specific, written prior permission. The above listed * copyright holder(s) make(s) no representations about the suitability of this * software for any purpose. It is provided "as is" without express or * implied warranty. * * THE ABOVE LISTED COPYRIGHT HOLDER(S) DISCLAIM(S) ALL WARRANTIES WITH REGARD * TO THIS SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY * AND FITNESS, IN NO EVENT SHALL THE ABOVE LISTED COPYRIGHT HOLDER(S) BE * LIABLE FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER * IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING * OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * */ #if !defined(DGUX) #if defined(__SVR4) #if !defined(SVR4) #define SVR4 #endif #endif #endif #if defined(DGUX) #define DG_NO_SYSI86 1 #endif #ifdef __EMX__ #define INCL_DOSFILEMGR #include #endif #include #include #include #if defined(SVR4) && !defined(DGUX) #if defined(sun) #ifndef __EXTENSIONS__ #define __EXTENSIONS__ #endif #endif #include #include #if defined(NCR) #define __STDC #include #undef __STDC #else #include #endif #if defined(__SUNPRO_C) || defined(sun) || defined(__sun) #include #else #include #endif #if defined(sun) && defined (i386) && defined (SVR4) /* Solaris? */ # if !defined(V86SC_IOPL) /* Solaris 7? */ #include /* Nope */ # else /* Do nothing what so ever */ /* Yup */ # endif /* V86SC_IOPL */ #else # include /* Not solaris */ #endif /* sun/i386/svr4 */ #endif #if defined(__FreeBSD__) || defined(__386BSD__) #include #include #ifndef GCCUSESGAS #define GCCUSESGAS #endif #endif #if defined(__NetBSD__) #include #include #include #ifndef GCCUSESGAS #define GCCUSESGAS #endif #endif #if defined(__bsdi__) #include #include #include #ifndef GCCUSESGAS #define GCCUSESGAS #endif #endif #if defined(DGUX) #include #include #include #include #include #include /* Definition of SI86IOPL for DG/ux */ #if defined(DG_NO_SYSI86) #define SI86IOPL 112 #endif #endif /* DGUX */ #if defined(SCO) || defined(ISC) #ifndef ISC #include #endif #include #include #include #include #include #include #include #endif #if defined(Lynx_22) #ifndef GCCUSESGAS #define GCCUSESGAS #endif #endif #if defined(__WATCOMC__) #include void outl(unsigned port, unsigned data); #pragma aux outl = "out dx, eax" parm [dx] [eax]; void outb(unsigned port, unsigned data); #pragma aux outb = "out dx, al" parm [dx] [eax]; unsigned inl(unsigned port); #pragma aux inl = "in eax, dx" parm [dx]; unsigned inb(unsigned port); #pragma aux inb = "xor eax,eax" "in al, dx" parm [dx]; #else /* __WATCOMC__ */ #if defined(__GNUC__) #if !defined(__alpha__) && !defined(__powerpc__) && !defined(__sparc__) #if defined(GCCUSESGAS) #define OUTB_GCC "outb %0,%1" #define OUTL_GCC "outl %0,%1" #define INB_GCC "inb %1,%0" #define INL_GCC "inl %1,%0" #else #define OUTB_GCC "out%B0 (%1)" #define OUTL_GCC "out%L0 (%1)" #define INB_GCC "in%B0 (%1)" #define INL_GCC "in%L0 (%1)" #endif /* GCCUSESGAS */ static void outb(unsigned short port, unsigned char val) { __asm__ __volatile__(OUTB_GCC : :"a" (val), "d" (port)); } static void outl(unsigned short port, unsigned long val) { __asm__ __volatile__(OUTL_GCC : :"a" (val), "d" (port)); } static unsigned char inb(unsigned short port) { unsigned char ret; __asm__ __volatile__(INB_GCC : "=a" (ret) : "d" (port)); return ret; } static unsigned long inl(unsigned short port) { unsigned long ret; __asm__ __volatile__(INL_GCC : "=a" (ret) : "d" (port)); return ret; } #endif /* !defined(__alpha__) && !defined(__powerpc__) && !defined(__sparc__) */ #else /* __GNUC__ */ #if defined(__STDC__) && (__STDC__ == 1) # if !defined(NCR) # define asm __asm # endif #endif #if defined(__SUNPRO_C) /* * This section is a gross hack in if you tell anyone that I wrote it, * I'll deny it. :-) * The leave/ret instructions are the big hack to leave %eax alone on return. */ unsigned char inb(int port) { asm(" movl 8(%esp),%edx"); asm(" subl %eax,%eax"); asm(" inb (%dx)"); asm(" leave"); asm(" ret"); } unsigned short inw(int port) { asm(" movl 8(%esp),%edx"); asm(" subl %eax,%eax"); asm(" inw (%dx)"); asm(" leave"); asm(" ret"); } unsigned long inl(int port) { asm(" movl 8(%esp),%edx"); asm(" inl (%dx)"); asm(" leave"); asm(" ret"); } void outb(int port, unsigned char value) { asm(" movl 8(%esp),%edx"); asm(" movl 12(%esp),%eax"); asm(" outb (%dx)"); } void outw(int port, unsigned short value) { asm(" movl 8(%esp),%edx"); asm(" movl 12(%esp),%eax"); asm(" outw (%dx)"); } void outl(int port, unsigned long value) { asm(" movl 8(%esp),%edx"); asm(" movl 12(%esp),%eax"); asm(" outl (%dx)"); } #else #if defined(SVR4) && !defined(DGUX) # if !defined(__USLC__) # define __USLC__ # endif #endif #if defined(DGUX) # if !defined(_USL) # define _USL # endif #endif #ifndef SCO325 # include #else # include "scoasm.h" #endif #endif /* SUNPRO_C */ #endif /* __GNUC__ */ #endif /* __WATCOMC__ */ #if defined(__alpha__) || defined(__sparc__) #if defined(linux) #include #if defined(__sparc__) #if !defined(__NR_pciconfig_read) #define __NR_pciconfig_read 148 #define __NR_pciconfig_write 149 #endif #endif #define BUS(tag) (((tag)>>16)&0xff) #define DFN(tag) (((tag)>>8)&0xff) int pciconfig_read( unsigned char bus, unsigned char dfn, unsigned char off, unsigned char len, void * buf) { return syscall(__NR_pciconfig_read, bus, dfn, off, len, buf); } int pciconfig_write( unsigned char bus, unsigned char dfn, unsigned char off, unsigned char len, void * buf) { return syscall(__NR_pciconfig_write, bus, dfn, off, len, buf); } #else Generate compiler error - scanpci unsupported on non-linux alpha and sparc platforms #endif /* linux */ #endif /* __alpha__ || __sparc__ */ #if defined(Lynx) && defined(__powerpc__) /* let's mimick the Linux Alpha stuff for LynxOS so we don't have * to change too much code */ #include unsigned char *pciConfBase; static __inline__ unsigned long swapl(unsigned long val) { unsigned char *p = (unsigned char *)&val; return ((p[3] << 24) | (p[2] << 16) | (p[1] << 8) | (p[0] << 0)); } #define BUS(tag) (((tag)>>16)&0xff) #define DFN(tag) (((tag)>>8)&0xff) #define PCIBIOS_DEVICE_NOT_FOUND 0x86 #define PCIBIOS_SUCCESSFUL 0x00 int pciconfig_read( unsigned char bus, unsigned char dev, unsigned char offset, int len, /* unused, alway 4 */ unsigned long *val) { unsigned long _val; unsigned long *ptr; dev >>= 3; if (bus || dev >= 16) { *val = 0xFFFFFFFF; return PCIBIOS_DEVICE_NOT_FOUND; } else { ptr = (unsigned long *)(pciConfBase + ((1<>= 3; _val = swapl(val); if (bus || dev >= 16) { return PCIBIOS_DEVICE_NOT_FOUND; } else { ptr = (unsigned long *)(pciConfBase + ((1< 0) { pcr._pcibuses[pcr._pcinumbus++] = pcr._secondary_bus_number; } break; case PCI_CLASS_BRIDGE: if ( ++hostbridges > 1) { pcr._pcibuses[pcr._pcinumbus] = pcr._pcinumbus; pcr._pcinumbus++; } break; default: break; } if((func==0) && ((pcr._header_type & PCI_MULTIFUNC_DEV) == 0)) { /* not a multi function device */ func = 8; } else { func++; } if (idx++ >= MAX_PCI_DEVICES) continue; identify_card(&pcr, verbose); } while( func < 8 ); } } while (++pcr._pcibusidx < pcr._pcinumbus); } #if !defined(__alpha__) && !defined(__powerpc__) && !defined(__sparc__) /* Now try pci config 2 probe (deprecated) */ if ((pcr._configtype == 2) || do_mode2_scan) { outb(PCI_MODE2_ENABLE_REG, 0xF1); outb(PCI_MODE2_FORWARD_REG, 0x00); /* bus 0 for now */ printf("\nPCI probing configuration type 2\n"); pcr._pcibuses[0] = 0; pcr._pcinumbus = 1; pcr._pcibusidx = 0; idx = 0; do { for (pcr._ioaddr = 0xC000; pcr._ioaddr < 0xD000; pcr._ioaddr += 0x0100){ outb(PCI_MODE2_FORWARD_REG, pcr._pcibuses[pcr._pcibusidx]); /* bus 0 for now */ pcr._device_vendor = inl(pcr._ioaddr); outb(PCI_MODE2_FORWARD_REG, 0x00); /* bus 0 for now */ if ((pcr._vendor == 0xFFFF) || (pcr._device == 0xFFFF)) continue; if ((pcr._vendor == 0xF0F0) || (pcr._device == 0xF0F0)) continue; /* catch ASUS P55TP4XE motherboards */ printf("\npci bus 0x%x slot at 0x%04x, vendor 0x%04x device 0x%04x\n", pcr._pcibuses[pcr._pcibusidx], pcr._ioaddr, pcr._vendor, pcr._device); outb(PCI_MODE2_FORWARD_REG, pcr._pcibuses[pcr._pcibusidx]); /* bus 0 for now */ pcr._status_command = inl(pcr._ioaddr + 0x04); pcr._class_revision = inl(pcr._ioaddr + 0x08); pcr._bist_header_latency_cache = inl(pcr._ioaddr + 0x0C); pcr._base0 = inl(pcr._ioaddr + 0x10); pcr._base1 = inl(pcr._ioaddr + 0x14); pcr._base2 = inl(pcr._ioaddr + 0x18); pcr._base3 = inl(pcr._ioaddr + 0x1C); pcr._base4 = inl(pcr._ioaddr + 0x20); pcr._base5 = inl(pcr._ioaddr + 0x24); pcr._subsys_card_vendor = inl(pcr._ioaddr + 0x2c); pcr._baserom = inl(pcr._ioaddr + 0x30); pcr._max_min_ipin_iline = inl(pcr._ioaddr + 0x3C); pcr._user_config = inl(pcr._ioaddr + 0x40); outb(PCI_MODE2_FORWARD_REG, 0x00); /* bus 0 for now */ /* check for pci-pci bridges (currently we only know Digital) */ if ((pcr._vendor == 0x1011) && (pcr._device == 0x0001)) if (pcr._secondary_bus_number > 0) pcr._pcibuses[pcr._pcinumbus++] = pcr._secondary_bus_number; if (idx++ >= MAX_PCI_DEVICES) continue; identify_card(&pcr, verbose); } } while (++pcr._pcibusidx < pcr._pcinumbus); outb(PCI_MODE2_ENABLE_REG, 0x00); } #endif /* __alpha__ */ disable_os_io(); } void identify_card(struct pci_config_reg *pcr, int verbose) { int i = 0, j, foundit = 0; while (pvd[i].vendorname != (char *)NULL) { if (pvd[i].vendor_id == pcr->_vendor) { j = 0; printf(" %s ", pvd[i].vendorname); while (pvd[i].device[j].devicename != (char *)NULL) { if (pvd[i].device[j].device_id == pcr->_device) { printf("%s", pvd[i].device[j].devicename); foundit = 1; break; } j++; } } if (foundit) break; i++; } if (!foundit) printf(" Device unknown\n"); else { printf("\n"); if (verbose) { if (pvd[i].device[j].print_func != (void (*)())NULL) { pvd[i].device[j].print_func(pcr); return; } } } if (verbose) { printf(" CardVendor 0x%04x card 0x%04x\n", pcr->_subsys_vendor, pcr->_subsys_card); if (pcr->_status_command) printf(" STATUS 0x%04x COMMAND 0x%04x\n", pcr->_status, pcr->_command); if (pcr->_class_revision) printf(" CLASS 0x%02x 0x%02x 0x%02x REVISION 0x%02x\n", pcr->_base_class, pcr->_sub_class, pcr->_prog_if, pcr->_rev_id); switch (pcr->_class_revision & PCI_CLASS_MASK) { case PCI_CLASS_BRIDGE: switch (pcr->_class_revision & PCI_SUBCLASS_MASK) { case PCI_SUBCLASS_BRIDGE_PCI: print_bridge_pci_class(pcr); break; default: print_bridge_class(pcr); break; } break; default: print_default_class(pcr); break; } } } void print_default_class(struct pci_config_reg *pcr) { if (pcr->_bist_header_latency_cache) printf(" BIST 0x%02x HEADER 0x%02x LATENCY 0x%02x CACHE 0x%02x\n", pcr->_bist, pcr->_header_type, pcr->_latency_timer, pcr->_cache_line_size); if (pcr->_base0) printf(" BASE0 0x%08x addr 0x%08x %s\n", pcr->_base0, pcr->_base0 & (pcr->_base0 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0), pcr->_base0 & 0x1 ? "I/O" : "MEM"); if (pcr->_base1) printf(" BASE1 0x%08x addr 0x%08x %s\n", pcr->_base1, pcr->_base1 & (pcr->_base1 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0), pcr->_base1 & 0x1 ? "I/O" : "MEM"); if (pcr->_base2) printf(" BASE2 0x%08x addr 0x%08x %s\n", pcr->_base2, pcr->_base2 & (pcr->_base2 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0), pcr->_base2 & 0x1 ? "I/O" : "MEM"); if (pcr->_base3) printf(" BASE3 0x%08x addr 0x%08x %s\n", pcr->_base3, pcr->_base3 & (pcr->_base3 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0), pcr->_base3 & 0x1 ? "I/O" : "MEM"); if (pcr->_base4) printf(" BASE4 0x%08x addr 0x%08x %s\n", pcr->_base4, pcr->_base4 & (pcr->_base4 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0), pcr->_base4 & 0x1 ? "I/O" : "MEM"); if (pcr->_base5) printf(" BASE5 0x%08x addr 0x%08x %s\n", pcr->_base5, pcr->_base5 & (pcr->_base5 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0), pcr->_base5 & 0x1 ? "I/O" : "MEM"); if (pcr->_baserom) printf(" BASEROM 0x%08x addr 0x%08x %sdecode-enabled\n", pcr->_baserom, pcr->_baserom & 0xFFFF8000, pcr->_baserom & 0x1 ? "" : "not-"); if (pcr->_max_min_ipin_iline) printf(" MAX_LAT 0x%02x MIN_GNT 0x%02x INT_PIN 0x%02x INT_LINE 0x%02x\n", pcr->_max_lat, pcr->_min_gnt, pcr->_int_pin, pcr->_int_line); if (pcr->_user_config) printf(" BYTE_0 0x%02x BYTE_1 0x%02x BYTE_2 0x%02x BYTE_3 0x%02x\n", pcr->_user_config_0, pcr->_user_config_1, pcr->_user_config_2, pcr->_user_config_3); } #define PCI_B_FAST_B_B 0x80 #define PCI_B_SB_RESET 0x40 #define PCI_B_M_ABORT 0x20 #define PCI_B_VGA_EN 0x08 #define PCI_B_ISA_EN 0x04 #define PCI_B_P_ERR 0x01 void print_bridge_pci_class(struct pci_config_reg *pcr) { if (pcr->_bist_header_latency_cache) printf(" HEADER 0x%02x LATENCY 0x%02x\n", pcr->_header_type, pcr->_latency_timer); printf(" PRIBUS 0x%02x SECBUS 0x%02x SUBBUS 0x%02x SECLT 0x%02x\n", pcr->_primary_bus_number, pcr->_secondary_bus_number, pcr->_subordinate_bus_number, pcr->_secondary_latency_timer); printf(" IOBASE 0x%02x IOLIM 0x%02x SECSTATUS 0x%04x\n", pcr->_io_base << 8, (pcr->_io_limit << 8) | 0xfff, pcr->_secondary_status); printf(" NOPREFETCH_MEMBASE 0x%08x MEMLIM 0x%08x\n", pcr->_mem_base << 16, (pcr->_mem_limit << 16) | 0xfffff); printf(" PREFETCH_MEMBASE 0x%08x MEMLIM 0x%08x\n", pcr->_prefetch_mem_base << 16, (pcr->_prefetch_mem_limit << 16) | 0xfffff); printf(" %sFAST_B2B %sSEC_BUS_RST %sM_ABRT %sVGA_EN %sISA_EN" " %sPERR_EN\n", (pcr->_b_ctrl & PCI_B_FAST_B_B) ? "" : "NO_", (pcr->_b_ctrl & PCI_B_SB_RESET) ? "" : "NO_", (pcr->_b_ctrl & PCI_B_M_ABORT) ? "" : "NO_", (pcr->_b_ctrl & PCI_B_VGA_EN) ? "" : "NO_", (pcr->_b_ctrl & PCI_B_ISA_EN) ? "" : "NO_", (pcr->_b_ctrl & PCI_B_P_ERR) ? "" : "NO_"); } void print_bridge_class(struct pci_config_reg *pcr) { if (pcr->_bist_header_latency_cache) printf(" HEADER 0x%02x LATENCY 0x%02x\n", pcr->_header_type, pcr->_latency_timer); } void print_mach64(struct pci_config_reg *pcr) { unsigned long sparse_io = 0; if (pcr->_status_command) printf(" STATUS 0x%04x COMMAND 0x%04x\n", pcr->_status, pcr->_command); if (pcr->_class_revision) printf(" CLASS 0x%02x 0x%02x 0x%02x REVISION 0x%02x\n", pcr->_base_class, pcr->_sub_class, pcr->_prog_if, pcr->_rev_id); if (pcr->_bist_header_latency_cache) printf(" BIST 0x%02x HEADER 0x%02x LATENCY 0x%02x CACHE 0x%02x\n", pcr->_bist, pcr->_header_type, pcr->_latency_timer, pcr->_cache_line_size); if (pcr->_base0) printf(" APBASE 0x%08x addr 0x%08x\n", pcr->_base0, pcr->_base0 & (pcr->_base0 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0)); if (pcr->_base1) printf(" BLOCKIO 0x%08x addr 0x%08x\n", pcr->_base1, pcr->_base1 & (pcr->_base1 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0)); if (pcr->_base2) printf(" REGBASE 0x%08x addr 0x%08x\n", pcr->_base2, pcr->_base2 & (pcr->_base2 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0)); if (pcr->_baserom) printf(" BASEROM 0x%08x addr 0x%08x %sdecode-enabled\n", pcr->_baserom, pcr->_baserom & 0xFFFF8000, pcr->_baserom & 0x1 ? "" : "not-"); if (pcr->_max_min_ipin_iline) printf(" MAX_LAT 0x%02x MIN_GNT 0x%02x INT_PIN 0x%02x INT_LINE 0x%02x\n", pcr->_max_lat, pcr->_min_gnt, pcr->_int_pin, pcr->_int_line); switch (pcr->_user_config_0 & 0x03) { case 0: sparse_io = 0x2ec; break; case 1: sparse_io = 0x1cc; break; case 2: sparse_io = 0x1c8; break; } printf(" SPARSEIO 0x%03x %s IO enabled %sable 0x46E8\n", sparse_io, pcr->_user_config_0 & 0x04 ? "Block" : "Sparse", pcr->_user_config_0 & 0x08 ? "Dis" : "En"); } void print_i128(struct pci_config_reg *pcr) { if (pcr->_status_command) printf(" STATUS 0x%04x COMMAND 0x%04x\n", pcr->_status, pcr->_command); if (pcr->_class_revision) printf(" CLASS 0x%02x 0x%02x 0x%02x REVISION 0x%02x\n", pcr->_base_class, pcr->_sub_class, pcr->_prog_if, pcr->_rev_id); if (pcr->_bist_header_latency_cache) printf(" BIST 0x%02x HEADER 0x%02x LATENCY 0x%02x CACHE 0x%02x\n", pcr->_bist, pcr->_header_type, pcr->_latency_timer, pcr->_cache_line_size); printf(" MW0_AD 0x%08x addr 0x%08x %spre-fetchable\n", pcr->_base0, pcr->_base0 & 0xFFC00000, pcr->_base0 & 0x8 ? "" : "not-"); printf(" MW1_AD 0x%08x addr 0x%08x %spre-fetchable\n", pcr->_base1, pcr->_base1 & 0xFFC00000, pcr->_base1 & 0x8 ? "" : "not-"); printf(" XYW_AD(A) 0x%08x addr 0x%08x\n", pcr->_base2, pcr->_base2 & 0xFFC00000); printf(" XYW_AD(B) 0x%08x addr 0x%08x\n", pcr->_base3, pcr->_base3 & 0xFFC00000); printf(" RBASE_G 0x%08x addr 0x%08x\n", pcr->_base4, pcr->_base4 & 0xFFFF0000); printf(" IO 0x%08x addr 0x%08x\n", pcr->_base5, pcr->_base5 & 0xFFFFFF00); printf(" RBASE_E 0x%08x addr 0x%08x %sdecode-enabled\n", pcr->_baserom, pcr->_baserom & 0xFFFF8000, pcr->_baserom & 0x1 ? "" : "not-"); if (pcr->_max_min_ipin_iline) printf(" MAX_LAT 0x%02x MIN_GNT 0x%02x INT_PIN 0x%02x INT_LINE 0x%02x\n", pcr->_max_lat, pcr->_min_gnt, pcr->_int_pin, pcr->_int_line); } void print_pcibridge(struct pci_config_reg *pcr) { if (pcr->_status_command) printf(" STATUS 0x%04x COMMAND 0x%04x\n", pcr->_status, pcr->_command); if (pcr->_class_revision) printf(" CLASS 0x%02x 0x%02x 0x%02x REVISION 0x%02x\n", pcr->_base_class, pcr->_sub_class, pcr->_prog_if, pcr->_rev_id); if (pcr->_bist_header_latency_cache) printf(" BIST 0x%02x HEADER 0x%02x LATENCY 0x%02x CACHE 0x%02x\n", pcr->_bist, pcr->_header_type, pcr->_latency_timer, pcr->_cache_line_size); printf(" PRIBUS 0x%02x SECBUS 0x%02x SUBBUS 0x%02x SECLT 0x%02x\n", pcr->_primary_bus_number, pcr->_secondary_bus_number, pcr->_subordinate_bus_number, pcr->_secondary_latency_timer); printf(" IOBASE 0x%02x IOLIM 0x%02x SECSTATUS 0x%04x\n", pcr->_io_base << 8, (pcr->_io_limit << 8) | 0xfff, pcr->_secondary_status); printf(" NOPREFETCH_MEMBASE 0x%08x MEMLIM 0x%08x\n", pcr->_mem_base << 16, (pcr->_mem_limit << 16) | 0xfffff); printf(" PREFETCH_MEMBASE 0x%08x MEMLIM 0x%08x\n", pcr->_prefetch_mem_base << 16, (pcr->_prefetch_mem_limit << 16) | 0xfffff); printf(" RBASE_E 0x%08x addr 0x%08x %sdecode-enabled\n", pcr->_baserom, pcr->_baserom & 0xFFFF8000, pcr->_baserom & 0x1 ? "" : "not-"); if (pcr->_max_min_ipin_iline) printf(" MAX_LAT 0x%02x MIN_GNT 0x%02x INT_PIN 0x%02x INT_LINE 0x%02x\n", pcr->_max_lat, pcr->_min_gnt, pcr->_int_pin, pcr->_int_line); } static int io_fd; #ifdef __EMX__ USHORT callgate[3] = {0,0,0}; #endif void enable_os_io() { #if (defined(SVR4) || defined(SCO) || defined(ISC)) || defined(DGUX) #if defined(SI86IOPL) || defined(DGUX) sysi86(SI86IOPL, 3); #else sysi86(SI86V86, V86SC_IOPL, PS_IOPL); #endif #endif #if defined(linux) && !defined(__sparc__) iopl(3); #endif #if defined(__FreeBSD__) || defined(__386BSD__) || defined(__bsdi__) if ((io_fd = open("/dev/console", O_RDWR, 0)) < 0) { perror("/dev/console"); exit(1); } #if defined(__FreeBSD__) || defined(__386BSD__) if (ioctl(io_fd, KDENABIO, 0) < 0) { perror("ioctl(KDENABIO)"); exit(1); } #endif #if defined(__bsdi__) if (ioctl(io_fd, PCCONENABIOPL, 0) < 0) { perror("ioctl(PCCONENABIOPL)"); exit(1); } #endif #endif #if defined(__NetBSD__) #if !defined(USE_I386_IOPL) if ((io_fd = open("/dev/io", O_RDWR, 0)) < 0) { perror("/dev/io"); exit(1); } #else if (i386_iopl(1) < 0) { perror("i386_iopl"); exit(1); } #endif /* USE_I386_IOPL */ #endif /* __NetBSD__ */ #if defined(__OpenBSD__) if (i386_iopl(1) < 0) { perror("i386_iopl"); exit(1); } #endif /* __OpenBSD__ */ #if defined(MACH386) if ((io_fd = open("/dev/iopl", O_RDWR, 0)) < 0) { perror("/dev/iopl"); exit(1); } #endif #ifdef __EMX__ { HFILE hfd; ULONG dlen,action; APIRET rc; static char *ioDrvPath = "/dev/fastio$"; if (DosOpen((PSZ)ioDrvPath, (PHFILE)&hfd, (PULONG)&action, (ULONG)0, FILE_SYSTEM, FILE_OPEN, OPEN_SHARE_DENYNONE|OPEN_FLAGS_NOINHERIT|OPEN_ACCESS_READONLY, (ULONG)0) != 0) { fprintf(stderr,"Error opening fastio$ driver...\n"); fprintf(stderr,"Please install xf86sup.sys in config.sys!\n"); exit(42); } callgate[0] = callgate[1] = 0; /* Get callgate from driver for fast io to ports and other stuff */ rc = DosDevIOCtl(hfd, (ULONG)0x76, (ULONG)0x64, NULL, 0, NULL, (ULONG*)&callgate[2], sizeof(USHORT), &dlen); if (rc) { fprintf(stderr,"xf86-OS/2: EnableIOPorts failed, rc=%d, dlen=%d; emergency exit\n", rc,dlen); DosClose(hfd); exit(42); } /* Calling callgate with function 13 sets IOPL for the program */ asm volatile ("movl $13,%%ebx;.byte 0xff,0x1d;.long _callgate" : /*no outputs */ : /*no inputs */ : "eax","ebx","ecx","edx","cc"); DosClose(hfd); } #endif #if defined(Lynx) && defined(__powerpc__) pciConfBase = (unsigned char *) smem_create("PCI-CONF", (char *)0x80800000, 64*1024, SM_READ|SM_WRITE); if (pciConfBase == (void *) -1) exit(1); #endif } void disable_os_io() { #if (defined(SVR4) || defined(SCO) || defined(ISC)) || defined(DGUX) #if defined(SI86IOPL) || defined(DGUX) sysi86(SI86IOPL, 0); #else sysi86(SI86V86, V86SC_IOPL, 0); #endif #endif #if defined(linux) && !defined(__sparc__) iopl(0); #endif #if defined(__FreeBSD__) || defined(__386BSD__) if (ioctl(io_fd, KDDISABIO, 0) < 0) { perror("ioctl(KDDISABIO)"); close(io_fd); exit(1); } close(io_fd); #endif #if defined(__NetBSD__) #if !defined(USE_I386_IOPL) close(io_fd); #else if (i386_iopl(0) < 0) { perror("i386_iopl"); exit(1); } #endif /* NetBSD1_1 */ #endif /* __NetBSD__ */ #if defined(__bsdi__) if (ioctl(io_fd, PCCONDISABIOPL, 0) < 0) { perror("ioctl(PCCONDISABIOPL)"); close(io_fd); exit(1); } close(io_fd); #endif #if defined(MACH386) close(io_fd); #endif #if defined(Lynx) && defined(__powerpc__) smem_create(NULL, (char *) pciConfBase, 0, SM_DETACH); smem_remove("PCI-CONF"); pciConfBase = NULL; #endif } #if defined(DGUX) && defined(DG_NO_SYSI86) asm("sysi86:_sysi86:pushl %ebp"); asm("movl %esp,%ebp"); asm("pushl 12(%ebp)"); asm("pushl 8(%ebp)"); asm("pushl 4(%ebp)"); asm("movl $50,%eax"); asm("lcall $7,$0"); asm("addl $12,%esp"); asm("leave"); asm("ret"); #endif /* DGUX && NO_SYSI86 */